Kim Andersen, your lawyer will be hearing from my lawyer...

 >> And anyway, it's internally double-clocked - A 32Mhz 68040 is actually
 >> ticking away at 64Mhz.
 KA>
 KA> This is WRONG!
 KA>
 KA> The 68040 uses the BLCK for the floating point unit and the instruction
 KA> unit. Those two determine the raw power of this cpu (or any other for
 KA> that matter).
 KA> There is a PCLK, which is exactly BLCK * 2, but this is only used for
 KA> some internal logic and therfore does not influence the speed.
 KA>
 KA> --
 KA> /Hendr!K/

Hi Kim, this guy Hendrik is picking a few items from basic hardware notes and 
turning them against you in the hope that you won't understand what he is 
talking about. Unfortunately for him, I do understand, and he is as wrong as 
you could possibly get. >:)

His understanding of the clock inputs is severely limited and it looks to me as 
if he is taking Motorola schematics and applying Intel design philosophy to 
them.

So here is how the 68040 works:

The main clock which interfaces to the external bus *does* run at 32Mhz, as do 
the instruction and FP units - this makes it much easier to build the chip onto 
existing motherboards without requiring 64Mhz bus logic. But this does *not* 
mean that the chip is not double clocked - quite the opposite in fact. For the 
term double-clocked to be applicable, the chip must run 2X faster internally 
than it does externally. The 486DX2 does this by running the whole internal 
structure of the 486 at 2X clock speed. The 68040 does not take this approach 
as it is *not* efficient. The 68040 instruction set consists of very complex 
instructions that actually take many cycles to graduate. To provide a high 
throughput, the chip has a 5 stage pipeline, so that a series of 5 cycle 
instructions appear to run at an average of 1 cycle each. But very few 68040 
instructions can be completed in 5 cycles, so the instruction 
prefetch/decoding/execution logic is double-clocked to avoid pipeline stalls. 
For example, say an (idealised) instruction takes 2 clock cycles at each stage 
of the pipeline = 10 clock cycles in total. The double clocked logic allows 
each stage to be completed in what appears to be 1 cycle to the instruction 
unit. With the pipeline, a series of these will average to 1 clock cycle per 
whole instruction.

So, the chip is taking 10 cycle instructions and executing them effectively at 
1 per cycle. Now, what makes the 68040 a *real* double clocked chip is the fact 
that it _depends_ on the system to work - it is *not* an afterthought like the 
486DX2 series and the method of double clocking used is far more efficient. In 
the 486, double clocking simply requires some logic to run the whole chip 
faster than the main bus, but this does not give anywhere near 2X throughput as 
people would have you believe. The reason for this is that routines that access 
external memory constantly will cause the double clocked processor to stall 
while memory is fetched. The 68040, on the other hand, does not care about 
this, as the double clocking is used to allow it to graduate its *far* more 
complex instructions twice as fast as normal. This is a very subtle difference 
- unlearned people would probably think that both methods are equivalent, but 
that is not the case. The 68040 *is* double clocked and is (in an effectiveness 
sense) *more* double clocked that the 486DX2, if such a thing can be quantified.

It would be futile for this Hendrik person to argue these facts. He is wrong 
because he does not understand what he is talking about - he is merely 
extracting facts out-of-context and using these to make a point (falsely).

If he still does not believe the facts from Doug or myself, he can phone 
Motorola and ask them to send him the designer's notes, which explain the 
matter in great detail. They would not lie about the subject, as they have 
*never* used the double clocking as a marketing ploy, unlike Intel.

Failing that, tell him to shut up. >:)

Incidently, is this the guy who likes to complain about Apex in public ? If so, 
I would be interested to hear what wonders of software engineering have 
manifested themselves from his tiny mind to date.

Anyway, Kim, keep your chin up and stay cool. You're in safe hands. >:)

Cheers,

Neil


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    ϸ ( (o)(o) )
    Neil Stewart, Doug Little ް|  ____  |
    Dave Encill, Nick Hesketh \ \__/ /
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