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# -------------------------------------------------------------------
# JAGUAR                                (c) Copyright 1996 Nat! & KKP
# -------------------------------------------------------------------
# These are some of the results/guesses that Klaus and Nat! found
# out about the Jaguar. Since we are not under NDA or anything from
# Atari we feel free to give this to you for educational purposes
# only.
#
# Please note, that this is not official documentation from Atari
# or derived work thereof (both of us have never seen the Atari docs)
# and Atari isn't connected with this in any way.
#
# Please use this informationphile as a starting point for your own
# exploration and not as a reference. If you find anything inaccurate,
# missing, needing more explanation etc. by all means please write
# to us:
#    nat@zumdick.rhein-main.de
# or
#    kkp@gamma.dou.dk
#
# If you could do us a small favor, don't use this information for
# those lame flamewars on r.g.v.a or the mailing list.
#
# HTML soon ?
# -------------------------------------------------------------------
# $Id: general.txt,v 1.9 1996/02/11 23:00:41 nat Exp $                
# -------------------------------------------------------------------
No gospel contained here !!

A couple of general notes on the Jaguar. Please note about the bitness
issue, that this is just our general take of the scene. The bitness
is the way the chip 'feels' like (to us).



The Jaguar consists of these major parts:
=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=

a)    16/32 bit 68000 processor that is used to bootstrap the system.
      Feels like a 32bit chip (in many respects) with a 16 bit 
      memory interface

b)    32/64 bit GPU risclike processor that is the 'heart' of the
      system. The chip feels like a 32 bit chip with an 64 bit
      memory interface. This one has 4Kbytes of local memory for
      instruction and data.

c)    32/32 bit DSP chip, also risclike. Has a 32 bit memory interface
      and 8KB of local memory for instruction and data.

d)    a 64 bit objectprocessor (OP) that feeds the video chip

e)    a 64 bit Blitter


Input/output stuff:
=-=-=-=-=-=-=-=-=-=

a)    A videochip capable of displaying 16bit Cry/RGB or 24bit RGB
      pixels. Tightly coupled to the OP. 

b)    Digital joystickinterface + 2 ADCs on the joystick ports 
      for analog input. 

c)    2 16bit DACs for sound production

d)    Serial communications channel 


Systemstructure:
=-=-=-=-=-=-=-=

Consider the Jaguar to be the GPU, the OP, the Blitter, the memory 
and the videochip.
You got here a 64 bit system communication thing happening. All 
data is passed along the bus in 64 bit quantities (also known as
a phrase). Since you can pass data around the bus at a speed of
ca. 13.3Mhz (?) you get a thruput of a little more than 100MB/s.

The RAM is monolithic, in that there's no division between VideoRAM
and normal RAM. Usually the OP fetches the data from memory scanline by
scanline and stuffs it into two small videochip linebuffers. The
videochip only fetches data from there. It does not have access to
the main memory. 

There are "gateways" out of the main system to connect peripheral 
chips to it. There are two 32 bit gateways one to the DSP and one
to the ROMs and a 16 bit gateway to the 68000. Since the 68000 
doesn't have a cache, just keeping it running in an idle loop 
will probably impede maximum performance of the system. 
The gateways are most probably  unbuffered, which would mean that 
a 16 bit access by the 68000 is just as costly as a 64 bit access 
by the GPU.

The DSP is connected/integrated with some peripheral devices,
that provides serial communications capability, joystick interfacing
and hardware timers.

When the DSP reads from JERRY registers it doesn't access them over
the system bus, it reads them directly. This means all the addresses
in JERRY space. (It's most probably the same for TOM)



Endianness:   **** WARNING: High Bullshit content ****
=-=-=-=-=-=
[ The endianess shit is my fault. Klaus surely doesn't want to be 
  associated with this (nat/1996) ]

Bytes are just bytes

Word are two bytes, one being the MSB and the other being the LSB
(most significant byte, least significant byte)

Long words consist of four bytes, being MSB NSB ISB and LSB.
(Most, not so, insignificant, least)

Phrases consist of eight bytes
  MSB    HSB    VSB    RSB    QSB    NSB       ISB          LSB
(Most, highly, very, really, quite, not so, insignificant, least)

The Jaguar is a bit strange mixture of endianness schemes. 
The 68K thinks in Motorola terms MSB NSB ISB LSB  (most significant byte, 
not so significant byte, insignificant byte and least significant byte)

The OP thinks in terms of ISB LSB MSB LSB occasionally, for example
when using addresses, but also the right -  Motorola &gt;grin&lt; - way 
when examining phrases: MSB HSB VSB RSB QSB NSB ISB LSB.

The GPU seems to be configurable in its endianness.


Bandwidth:
---------

106.4 Mio bytes/s    or 101.5  MB/s  MB as in 1024*1024 bytes/s
13.3  Mio phrases/s 
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<address><a href="mailto:nat@zumdick.rhein-main.de">Nat! (nat@zumdick.rhein-main.de)</a></address>
<address><a href="mailto:kkp@gamma.dou.dk">Klaus (kkp@gamma.dou.dk)</a></address>
<P>
$Id: general.txt,v 1.9 1996/02/11 23:00:41 nat Exp $
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