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<TITLE>JERRY</TITLE>
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# -------------------------------------------------------------------
# JERRY                                 (c) Copyright 1996 Nat! & KKP
# -------------------------------------------------------------------
# These are some of the results/guesses that Klaus and Nat! found
# out about the Jaguar with a few helpful hints by other people, 
# who'd prefer to remain anonymous. 
#
# Since we are not under NDA or anything from Atari we feel free to 
# give this to you for educational purposes only.
#
# Please note, that this is not official documentation from Atari
# or derived work thereof (both of us have never seen the Atari docs)
# and Atari isn't connected with this in any way.
#
# Please use this informationphile as a starting point for your own
# exploration and not as a reference. If you find anything inaccurate,
# missing, needing more explanation etc. by all means please write
# to us:
#    nat@zumdick.rhein-main.de
# or
#    kkp@gamma.dou.dk
#
# If you could do us a small favor, don't use this information for
# those lame flamewars on r.g.v.a or the mailing list.
#
# HTML soon ?
# -------------------------------------------------------------------
# $Id: jerry.txt,v 1.10 1996/02/11 23:00:42 nat Exp $
# -------------------------------------------------------------------
Here are some of the leftovers of JERRY that aren't described in the 
RISC dox.


JOYSTICK/JOYPAD:
===============

Digital Joypad JOYSTICK:
=-=-=-=-=-=-=-=-=-=-=-=-=

   It seems that as a rule the bits are low active in these
   registers.


W: JOYSTICK ($F01400)
~~~~~~~~~~~~~~~~~~~~~
  16        12         8         4         0
   +-+-------^------+--+---------+---------+
   |u|    unused    |mu|  col 1  |  col 0  |  
   +-+--------------+--+---------+---------+
    15                8   7...4     3...0

   col 0:   column control of joypad 0 

      Here you select which column of the joypad to poll. 
      The columns are:

                Joystick       Joybut 
      col_bit| 3  2  1  0     1    0  
      -------+--+--+--+--    ---+------
         8   | R  L  D  U     A  PAUSE       (RLDU = Joypad directions)
         9   | *  7  4  1     B       
        10   | 2  5  8  0     C       
        11   | 3  6  9  #        OPTION

      You select a column my clearing the appropriate bit and setting
      all the other "column" bits. 


   col1:    column control of joypad 1

      This is pretty much the same as for joypad EXCEPT that the
      column addressing is reversed (strange!!)
            
                Joystick      Joybut 
      col_bit| 3  2  1  0     1    0
      -------+--+--+--+--    ---+------
        12   | 3  6  9  #        OPTION
        13   | 2  5  8  0     C
        14   | *  7  4  1     B
        15   | R  L  D  U     A  PAUSE     (RLDU = Joypad directions)

   mute (mu):   sound control

      You can turn off the sound by clearing this bit.

   unknown  (u):  unknown

      Theory: you can bankswitch to another set of Joypad control
              registers. Since we only got two ports, keep this
              set.

    
R: JOYSTICK ($F14000)
~~~~~~~~~~~~~~~~~~~~~
   16        12        8         4         0
   +---------+---------+---------^---------+
   |  pad 1  |  pad 0  |      unused       |
   +---------+---------+-------------------+
     15...12   11...8          7...0

   Reading this register gives you the output of the selected columns
   of the pads.
   The buttons pressed will appear as cleared bits. 
   See the description of the column addressing to map the bits 
   to the buttons.


RO: JOYBUTS/CONFIG ($F14002)
~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   16       12         8         4         0
   +---------^---------^----+--+-+----+----+
   |           unused       | e|p| b1 | b0 |  
   +------------------------+--+-+----+----+
         15...9       8 7..6  5 4 3..2 1..0
   
   b0:   button read out for pad 0
      bit 0:   PAUSE, OPTION status
      bit 1:   A, B, C status

   b1:   button read out for pad 1
      bit 2:   PAUSE, OPTION status
      bit 3:   A, B, C status

   Returns the status of some of the Joypad buttons. You address which
   information you want with the JOYSTICK register (described above).

   palflag (p):  
      if this flag is set, you have a NTSC jaguar else
      it's a PAL Jag

   endianess (e):
      Always set for Motorola endianess.

   unused/unkown (u):


Analog Joystick:
=-=-=-=-=-=-=-=


W: ANAJOY ($F17C00)
~~~~~~~~~~~~~~~~~~~
   16       12         8         4         0
   +---------^---------^---------^-+--+--+-+
   |            ???                |p |n |a|    WO
   +-------------------------------+--+--+-+

   axis (a) :  select X or Y for polling

      Set this bit to 1 for Y-axis polling, cleared: X-axis

   joystick (n):  select joystick   (??)
   
      Clear for joystick 0, set for joystick 1

   poll (p):    poll bit (??)

      Set this to one to initiate polling/ADC conversion ?
      It appears that after you start polling you need to give the ADC
      40 us time to convert the value.


R: ANAJOY ($F17C00) 
~~~~~~~~~~~~~~~~~~~
   16       12         8         4         0
   +---------^---------+---------^---------+
   |       unused      |       value       |    
   +-------------------+-------------------+
                               7...0

   value:   8 bit value from the ADC


SOUND PRODUCTION:
================


RW: R_DAC ($F1A148)
~~~~~~~~~~~~~~~~~~~
  32       28       24       20       16       12        8        4        0
   +--------^--------^--------^--------+--------^--------^--------^--------+
   |              unused               |             value                 |
   +-----------------------------------+-----------------------------------+

   just a guess


RW: L_DAC ($F1A14C)
~~~~~~~~~~~~~~~~~~~
  32       28       24       20       16       12        8        4        0
   +--------^--------^--------^--------+--------^--------^--------^--------+
   |              unused               |             value                 |
   +-----------------------------------+-----------------------------------+

   just a guess


RW: SCLK ($F1A150)
~~~~~~~~~~~~~~~~~~
  32       28       24       20       16       12        8        4        0
   +--------^--------^--------^--------^--------^--------^--------^--------+
   |                        unused                       |      divide     |
   +-----------------------------------------------------------------------+

divide:
   This determines the sampling rate (or the IRQ rate). A source clock is
   divided by the "divide" value according to the following highly 
   mathematical formula:

         frequency = clock_frequency / (divide + 1)

   If the SCLK isn't tied to one of the "mystery Clocks", then the 
   clock_frequency is running at a rate of:

         bus_frequency / 64

   So the other way around now:

         desired_frequency = bus_frequency / 64 / (divide + 1)
         divide = bus_frequency / 64 / desired_frequeny - 1

   Lets try with 44100: 26591000 / 64 / 44100 - 1 =  8.42 ~ 8  -> 45072
        and with 32000: 26591000 / 64 / 32000 - 1 = 11.98 ~ 12 -> 31960
        and with 25000: 26591000 / 64 / 44100 - 1 = 15.62 ~ 16 -> 25968

   
         
RW: SMODE ($F1A154)
~~~~~~~~~~~~~~~~~~~
  32       28       24       20       16       12        8        4        0
   +--------^--------^--------^--------^--------^--------^--------^--------+
   |                                                                       |
   +-----------------------------------------------------------------------+

   Set this to $15 for sound production



UNKNOWN STUFF:
=-=-=-=-=-=-=

R: CLK1 ($F10010)
~~~~~~~~~~~~~~~~~
  16        12         8         4         0
   +---------^---------^---------^---------+
   |                unknown                |  
   +---------------------------------------+

   Supposedly has something to do with the processor 
   clock frequency. I'd guess read only. 
   This register neither affects sound (SCLK) nor video appreciably.


WR: CLK2 ($F10012)
~~~~~~~~~~~~~~~~~~
  16        12         8         4         0
   +---------^---------^---------^---------+
   |                unknown                |  
   +---------------------------------------+

   Sets the video clock frequency ? Hmm,I don't really know what
   this is good for. Haven't noticed any effects either.
   This register neither affects sound (SCLK) nor video appreciably.
   
   Default values:   NTSC=181 PAL=226


RW: CHRO_CLK ($F10014)
~~~~~~~~~~~~~~~~~~~~~~
  16        12         8         4         0
   +---------^---------^---------^---------+
   |                unknown                |  
   +---------------------------------------+

   Maybe used to control the color DACs ? I haven't seen any effect
   with this register.
   This register neither affects sound (SCLK) nor video appreciably.

   Default value: 4



PROGRAMMABLE TIMER:
===================

RW: JPIT ($F10000)
~~~~~~~~~~~~~~~~~~
 32       28        24        20       16       12        8        4        0
  +--------^---------^---------^--------^--------^--------^--------^--------+
  |                                     |                                  |
  +-------------------------------------------------------------------------+

value:
   Looks similar to PIT of TOM, but is _not_ 100% compatible. It looks like
   the input clocking is different here. Hmmm.
   It will generate a LEVEL3 IRQ when it reaches zero. For the 68k both
   PIT and JPIT interrupts look the same.
</PRE>
<HR>
<address><a href="mailto:nat@zumdick.rhein-main.de">Nat! (nat@zumdick.rhein-main.de)</a></address>
<address><a href="mailto:kkp@gamma.dou.dk">Klaus (kkp@gamma.dou.dk)</a></address>
<P>
$Id: jerry.txt,v 1.10 1996/02/11 23:00:42 nat Exp $
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